The invention relates to a method for receiving a signal used in a synchronous digital telecommunication system.
The current digital transmission network is plesiochronous, that is each 2-Mbit/s basic multiplex system has a dedicated clock independent of any other system. It is therefore impossible to locate a single 2-Mbit/s signal in the bit stream of a higher-order system, but the higher level signal has to be demultiplexed through each intermediate level down to the 2 Mbit/s level to extract the 2-Mbit/s signal. For this reason, especially the construction of branch connections requiring several multiplexers and demultiplexers has been expensive. Another disadvantage of the plesiochronous transmission network is that equipment from two different manufacturers is not usually compatible.
The above drawbacks, among other things, have led to the introduction of the new synchronous digital hierarchy SDH specified in the CCITT recommendations G.707, G.708 and G.709. The synchronous digital hierarchy is based on STM-N transfer frames (Synchronous Transport Modules) located on several levels of hierarchy N (N=1,4,16 . . . ). Existing PCM systems, such as 2, 8- and 32-Mbit/s systems, are multiplexed into a synchronous 155.520-Mbit/s frame of the lowest level of the SDH (N=1). Consistently with the above, this frame is called the STM-1 frame. On the higher levels of hierarchy the bit rates are multiples of the bit rate of the lowest level. In principle, all nodes of the synchronous transmission network are synchronized into one clock. If some of the nodes should, however, lose connection with the common clock, it would lead to problems in the connections between the nodes. The phase of the frame must also be easy to recognize in the reception. For the reasons stated above, a pointer has been introduced in the SDH telecommunications, the pointer being a number which indicates the phase of the payload within the frame, i.e. the pointer indicates that byte in the STM frame from which the payload begins.
FIG. 1 illustrates the structure of an STM-N frame, and FIG. 2 illustrates a single STM-1 frame. The STM-N frame comprises a matrix with 9 rows and N.times.270 columns so that there is one byte at the junction point between each row and the column. Rows 1-3 and rows 5-9 of the N.times.9 first columns comprise a section overhead SOH, and row 4 comprises an AU pointer. The rest of the frame structure is formed of a section having the length of N.times.261 columns and containing the payload section of the STM-N frame.
FIG. 2 illustrates a single STM-1 frame which is 270 bytes in length, as described above. The payload section comprises one or more administration units AU. In the example shown in the figure, the payload section consists of the administration unit AU-4, into which a virtual container VC-4 is inserted. (Alternatively, the STM-1 transfer frame may contain three AU-3 units, each containing a corresponding virtual container VC-3). The VC-4, in turn, consists of a path overhead POH located at the beginning of each row and having the length of one byte (9 bytes altogether), and of the payload section in which there are lower-level frames also comprising bytes allowing interface justification to be performed in connection with mapping when the rate of the information signal to be mapped deviates from its nominal value to some extent. (Mapping of the information signal into the transmission frame STM-1 is described, e.g., in patent applications AU-B-34689/89 and FI-914746.
Each byte in the AU-4 unit has its own location number. The above-mentioned AU pointer contains the location of the first byte of the VC-4 container in the AU-4 unit. The pointers allow positive or negative pointer justifications to be performed at different points in the SDH network. If a virtual container having a certain clock frequency is applied to a network node operating at a clock frequency lower than the above-mentioned clock frequency of the virtual container, the data buffer will be filled up. This requires negative justification: one byte is transferred from the received virtual container into the overhead section while the pointer value is decreased by one. If the rate of the received virtual container is lower than the clock rate of the node, the data buffer tends to be emptied, which calls for positive justification: a stuff byte is added to the received virtual container and the pointer value is incremented by one.
FIG. 3 shows how the STM-N frame can be formed of existing bit streams. These bit streams (1.5, 2, 6, 8, 34, 45 or 140 Mbit/s, shown on the right in the figure) are packed at the first stage into containers C specified by CCITT. At the second stage, overhead bytes containing control data are inserted into the containers, thus obtaining the above-described virtual container VC-11, VC-12, VC-2, VC-3 or VC-4 (the first suffix in the abbreviations represents the level of hierarchy and the second suffix represents the bit rate). This virtual container remains intact while it passes through the synchronous network up to its point of delivery. Depending on the level of hierarchy, the virtual containers are further formed either into so-called tributary units TU or into AU units (AU-3 and AU-4) already mentioned above, by providing them with pointers. The AU unit can be mapped directly into the STM-1 frame, whereas the TU units have to be assembled through tributary unit groups TUG and VC-3 and VC-4 units to form AU units which then can be mapped into the STM-1 frame. In FIG. 3, the mapping is indicated by a continuous thin line, the aligning with a broken line, and the multiplexing with a continuous thicker line.
As is to be seen from FIG. 3, the STM-1 frame may be assembled in a number of alternative ways, and the content of the highest-level virtual container VC-4, for instance, may vary, depending on the level from which the assembly has been started and in which way the assembly has been performed. The STM-1 signal may thus contain, e.g., 3 TU-3 units or 21 TU-2 units or 63 TU-12 units, or a combination of some of the above-mentioned units. As the higher-level unit contains several lower-level units, e.g. the VC-4 unit contains TU-12 units (there are 63 such units in a single VC-4 unit, cf. FIG. 3), the lower-level units are mapped into the higher-level frame by interleaving so that the first bytes are first taken consecutively from each one of the lower-level units, then the second bytes, etc. The example of FIG. 2 shows with circled numbers how the VC-4 unit contains at first consecutively the first bytes of all 63 TU-12 units, then the second bytes of all 63 TU-12 units, etc.
The above-described SDH frame structures and the assembly of such structures have been described, e.g. in References [1] and [2], which are referred to for a more detailed description (the references are listed at the end of the specification).
The above-mentioned pointer mechanism allows flexible phase shift of different units within the STM frame and also reduces the size of buffer memories required in the network. In principle, the SDH system comprises pointers on two levels: AU pointers and TU pointers, which indicate the first byte of a virtual container VC within the AU or TU unit, respectively. The CCITT specifications relating to the pointer are set forth in Reference [1], which is referred to for a more detailed description.
As shown in FIG. 4a, the AU-4 pointer, for example, consists of nine successive bytes H1, Y, Y . . . H3, of which the bytes H1 and H2 are shown separately in FIG. 4b. The actual pointer value PTR consists of the ten last bits (bits 7 to 16) of the word formed by bytes H1 and H2. Correspondingly, the value of the TU pointer consists of the ten last bits of the word formed by bytes V1 and V2. The AU and TU pointers have quite similar coding even in other respects; there are, however, some differences, which will be described in the following.
First, the pointer value must be within a certain range in order to be acceptable. The acceptable decimal value of the AU-4 pointer is from 0 to 782, and the acceptable decimal value of the TU-12 pointer, for example, is from 0 to 139. These values are called off-set values, as they (within the frame structure) indicate the offset between the first byte of the pointer and that of the corresponding virtual container. Second, in order for the value "new" for the new data flag (NDF.sub.-- enable) defined by the N-bits (bits 1 to 4) to be acceptable, three bits should be identical in the AU pointer, and all bits should be identical in the TU pointer. The new data flag NDF allows arbitrary changes in the pointer value if they are the result of a change taking place in the payload. Normal operation (NDF.sub.-- disabled) is indicated by the N-bit values "0110", and the new pointer value (NDF.sub.-- enable) by the N-bit values "1001" (i.e. by inverting the bits of the normal state). In this way the new data flag, together with the new pointer value, indicates a change in the alignment of the virtual container within the frame, if the change is caused by some other reason than positive or negative justification (the transmitter may force a new alignment on the virtual container within the frame structure).
If the new data flag indicates a new pointer value (NDF.sub.-- enable), and the pointer value consists of one bits (i.e. if bits 1 to 16 are "1001SS11111111111" wherein the S-bits may be independently of one another one or zero), it signifies concatenation. Concatenation means that, e.g., AU-4 units are concatenated into one larger unit (so-called AU-4-Xc), which may transfer payloads which require a higher capacity than the C-4 container. (Correspondingly, TU-2 units can be concatenated into a larger unit capable of transferring greater payloads than the capacity of the C-2 container).
If all of the bits 1 to 16 are ones, it signifies alarm (AIS, Alarm Indication Signal).
The S-bits (bits 5 and 6) indicate on which level of hierarchy (shown in FIG. 3; e.g. TU-12) the operation is currently taking place.
The I- and D-bits of the 10-bit pointer word are used to indicate the positive and negative justification described above. If at least three out of five increment bits, or I-bits (bits 7, 9, 11, 13 and 15), are inverted, it signifies positive justification (if certain additional conditions are met). If at least three out of five decrement bits, or D-bits (bits 8, 10, 12, 14, 16), are inverted, it signifies negative justification (if certain additional conditions are met).
In Annex B.1. of CCITT recommendation G.783 (Reference [3]), justification functions are specified as follows:
increment data indicating positive justification inc.sub.-- ind=norm.sub.-- NDF+SS+majority of I-bits inverted+no majority of D-bits inverted+the value "new" for the new data flag (NDF.sub.-- enable), increment data (inc.sub.-- ind) or decrement data (dec.sub.--) has not been received in the three preceding frames, and
decrement data indicating negative justification dec.sub.-- ind=norm.sub.-- NDF+SS+majority of D-bits inverted+no majority of I-bits inverted+the value "new" for the new data flag (NDF.sub.-- enable), increment data (inc.sub.-- ind) or decrement data (dec.sub.--) has not been received in the three preceding frames.
In the definition given above, each "+" represents a logical AND function. In addition, the normal NDF (norm.sub.-- NDF) is defined so that all other bit combinations except the value "new" for the new data flag (NDF.sub.-- enable) are considered normal.
A condition for the acceptance of justification functions is thus that at least three frames have passed since the previous justification function or since the previous new pointer achieved by means of the the NDF. This is to prevent buffer memory overflow in the receiver.
The original CCITT recommendation has been improved in the new ETSI (European Telecommunication Standards Institute) recommendation (Annex PI to ETS DE/TM1015, 1992) so that in the definitions set forth above, the normal NDF (norm.sub.-- NDF) has been replaced by the definition disabled.sub.-- NDF. The justification requests in which two out of four N-bits are erroneous are rejected in the new recommendation.
It has, however, been found to be problematic in the present situation that, e.g., certain errors cannot be corrected rapidly if the existing recommendations are followed. For instance, if two or more justification requests are interpreted during 2 to 4 frames, it is difficult to know which of them was the correct justification request and which one or ones were correspondingly erroneous justification requests due to transmission errors. According to Annex B.1 to recommendation G.783, referred to above, this problem has been solved in such a manner that the first one is always the correct justification request, and the rest are erroneous.
As the SS-bits have, moreover, an effect on the acceptance of a justification request, an error in the transmission of even one of these bits may prevent the performance of a necessary justification function.
An erroneous justification function leads to at least three erroneous frames, during which data is transmitted in an erroneous phase with respect to the pointers. Usually it takes a much longer time before the situation is corrected.